BEQ rs, rt, <offset>
1.
Instruction
is fetched from memory. PC is incremented.
2. rs and rt registers are read from the register file and offset is sign-extended
to 32 bits.
3.
Control unit asserts “Branch”
signal. ALU Op will generate "subtract" signal. Values of rs and rt are fetched from the register file and
subtracted inside ALU.
