Sunday, 25 November 2012

Branch On Equal Datapath - by Liew Huei Yee B031210156




BEQ rs, rt, <offset>

1.     Instruction is fetched from memory. PC is incremented.
2.     rs and rt registers are read from the register file and offset is sign-extended to 32 bits.
3.     Control unit asserts “Branch” signal. ALU Op will generate "subtract" signal. Values of rs and rt are fetched from the register file and subtracted inside ALU.




Sunday, 21 October 2012


TOPIC 1 : Arithmetics for Computers (Number Systems and Operations)
 --- SIM YEE YEE

Number  System

Number  system  is  a  system  for  expressing  numbers  using  digits  or other   symbols  in  a  consistent  manner. The  number  system  we  use  nowadays  is  based  on the  Hindu-Arabic  system  which  uses  the  digits  0  1  2  3  4  5  6  7  8  &  9.
       
Binary system  is a base-2  system represents numeric  values  using  2  symbols , 0 & 1.

BINARY ADDITION

The  four  basic  rules  for  binary  addition  are  as  follows:

     0  +  0  =  0       Sum  of  0  with  a  carry  of  0
     0  +  1  =  1       Sum  of  1  with  a  carry  of  0
     1  +  0  =  1       Sum  of  1  with  a  carry  of  0
     1  +  1  =  10     Sum  of  0  with  a  carry  of  1  
     

BINARY SUBTRACTION

The  four  basic  rules  for  binary  subtraction  are  as  follows:
             0  -  0  =  0      
          1 0  -  1  =  1       0  -  1  with  a  borrow  of  1
             1  -  0  =  1      
             1  -  1  =  0      
              
                      

BINARY MULTIPICATION

The  four  basic  rules  for  binary  multiplication  are  as  follows: 

     0  x  0  =  0      
     0  x  1  =  0      
     1  x  0  =  0      
     1  x  1  =  1   

                  
                                
BINARY DIVISION

                             







DECIMAL


The decimal numeral system has ten as its base. It is the numeral base most widely used by modern civilizations. Decimal system using only the ten basic symbols 1,2,3,4,5,6,7,8,9 and 0.   


DECIMAL ADDITION

                                                                                            

                                                             

DECIMAL SUBTRACTON

                                         




DECIMAL MULTIPLICATION
                                             
                                          

DECIMAL DIVISION

                                               



HEXADEIMAL

Hexadecimal is a base 16  system. This system uses symbols 0 – 9 to represent the value from zero to 9 and symbols A – F to represent the value from ten to fifteen.        


HEXADECIMAL ADDITION



                                                           





HEXADECIMAL SUBTRACTION

                             


HEXADECIMAL MULTIPLICATION

                                                                      
                                      



HEXADECIMAL DIVISION
                                                     
                                                   

                                                                 

TOPIC 2 : DIGITAL LOGIC (TRUTH TABLE AND GRAPHICAL SYMBOL FOR COMBINATION LOGIC GATES) --- (SIM YEE YEE)


TRUTH TABLE
Ø A truth table is a mathematical table used in logic.
Ø A truth table at least contain 3 column for the basic logic gates except NOT GATE :
·        2 for input variables such as A and B, the last column of the truth table is the output of the logical operation
·        NOT GATE only contain 2 column which is 1 for input , another is output
Ø We can understand about the behaviour of logic gates and the combination of logic gates.



GRAPHICAL SYMBOLS


Ø Graphical symbols are used to show the different type of logical functions. The inputs are placed on the left and the output is placed on the right of the gate symbol .


Below are the truth table and graphical symbol for the combination logic gates :




TRUTH TABLE AND GRAPHICAL SYMBOL FOR COMBINATION GATES :


        EXAMPLES :
      
  1.     A’B + AB’

INPUT
OUTPUT
A
B
A’B
AB’
A’B + AB’
0
0
0
0
0
0
1
1
0
1
1
0
0
1
1
1
1
0
0
0



                    


        
                   2.    AB + CD



INPUT
OUTPUT
A
B
C
D
AB
CD
AB + CD
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
1
1
0
1
1
0
1
0
0
0
0
0
0
1
0
1
0
0
0
0
1
1
0
0
0
0
0
1
1
1
0
1
1
1
0
0
0
0
0
0
1
0
0
1
0
0
0
1
0
1
0
0
0
0
1
0
1
1
0
1
1
1
1
0
0
1
0
1
1
1
0
1
1
0
1
1
1
1
0
1
0
1
1
1
1
1
1
1
1














              3. A’B(C + D )



INPUT
OUTPUT
A
B
C
D
A’B
C+D
AB ( C+D)
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
1
0
0
1
0
0
0
1
0
1
1
1
1
0
1
1
0
1
1
1
0
1
1
1
1
1
1
1
0
0
0
0
0
0
1
0
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
1
0
1
0
1
1
0
0
0
0
0
1
1
0
1
0
1
0
1
1
1
0
0
1
0
1
1
1
1
0
1
0


























         4.  AB + A’B + A’BC



INPUT
OUTPUT
A
B
C
AB
A’B
A’BC
AB + A’B + A’BC
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
1
0
1
0
1
1
0
1
1
1
1
0
0
0
0
0
0
1
0
1
0
0
0
0
1
1
0
1
0
0
1
1
1
1
1
0
0
1